Part 1 introduced one relation. The smallest feature a scanner can print is k1 × λ / NA. This part takes that relation apart. Each of its three terms has been pushed for decades, and each push needed a new kind of machine, a new chemistry or a new way of laying out the chip. Shorter light (the λ term) took the industry from mercury lamps to lasers to a plasma of tin. Wider optics (the NA term) put a layer of water under the lens. Pushing k1, which covers everything else, brought masks that do not look like the circuit, light shaped into patterns of dots, and layers split into two, four or eight times as many lines.
Photolithography
Photolithography, Part 2: Resolution, From Mercury Lamps to EUV
Why chips need ever shorter light: Rayleigh’s equation, immersion lenses, k1 tricks, multi-patterning, resist limits, and how EUV makes 13.5nm light.
On this page 8 sections
The equation, term by term
In ASML’s form, the Rayleigh criterion gives the critical dimension (CD), the smallest feature a system can print:
CD = k1 × λ / NA
λ is the wavelength. NA is the numerical aperture, a measure of how wide a cone of light the projection optics gather and focus. k1 collects the rest of the process, from the resist to the mask to the shape of the illumination, and ASML puts its physical floor at 0.25. Halve the wavelength and the CD halves. Double the NA and it halves again. Push k1 from 0.4 to 0.25 and it shrinks by more than a third.
There is a second relation that the first one hides. Depth of focus is the height range over which the image stays sharp, and it scales with λ/NA², according to the IEEE International Roadmap for Devices and Systems (IRDS). So the same NA that sharpens the image shrinks the focus window by its square. A wider lens buys resolution with focus, and the IRDS ranks the loss of depth of focus among the most critical challenges for High-NA EUV.
The equation, term by term
The resolution floor from the equation, against what ASML quotes
That gap between the two dots is k1 at work. Put ASML’s quoted resolutions back through the equation (38nm for ArF light, here taken at immersion’s NA of 1.35, then 13nm for its NXE EUV scanners and 8nm for the EXE High-NA scanners) and they sit at a k1 of roughly 0.27 to 0.33 by that computation. Getting from there down toward 0.25 is the job of the illumination, the mask and the resist, and each step gets harder the closer a process gets. The figure also shows why the industry put up with everything EUV demanded. No amount of k1 work at 193nm comes near what 13.5nm light gives at a modest NA.
Shorter light
Wavelength is the biggest lever, and every move along it changed how the light is made. ASML’s first lithography systems used mercury arc lamps, filtered to the blue 436nm g-line and then the ultraviolet 365nm i-line. By ASML’s figures, g-line systems printed features down to 1 micron (1,000nm), i-line systems pushed that to 220nm, and modern KrF systems reach 80nm. ZEISS puts visible light at 400 to 800nm, so the g-line is visible blue and everything after it is not. In the mid-1980s the industry moved to excimer lasers, which pass a pulse of energy through a mix of a noble gas and fluorine. The mixes were krypton fluoride at 248nm and then argon fluoride at 193nm.
Shorter light
The lithography wavelengths on a log scale
The next step after 193nm was supposed to be 157nm, from a fluorine (F2) laser. ASML’s history of immersion tells what happened. Lenses for 157nm were to be made of calcium fluoride, and prototype systems showed double refraction far beyond the imaging specification. The effect was inherent to the crystal, and the roadmap stalled. Chipmakers stayed at 193nm and found its next gains in the other two terms, until EUV was ready.
Each wavelength step also needed its own resist, as Part 1 showed. Novolak served the mercury lines, polyhydroxystyrene served KrF, and methacrylate polymers served ArF. A light source is useless without a coating that reacts to it and an optic that passes or reflects it. This is a large part of why each step took years, and why EUV, which needed new sources, optics, masks, pellicles and resists all at once, took decades.
Wider optics, and a layer of water
Numerical aperture grows with the angle of the cone of light that reaches the wafer and with the refractive index of whatever fills the last gap between lens and wafer. In air, that caps NA at 1. Dry ArF scanners eventually reached an NA of 0.93, close to that cap.
Wider optics, and a layer of water
Dry and immersion imaging at the last lens element
Microscopy supplied the fix. A drop of liquid under the objective has been used for centuries, and IBM had described it for lithography in the 1980s. ASML’s account dates the turn to an industry conference in December 2001, where its researcher Jan Mulkens and others saw that a layer of purified water under the lens could carry 193nm light past the limit of air while the existing optics, masks and resists stayed in use. Its prototype, the TWINSCAN AT:1150i, showed results in autumn 2003, and ASML announced the first immersion system, the XT:1250i, that December. Water was the hard part because bubbles under the lens spoil the image and stray droplets mark the resist. ASML’s answer was an immersion hood, a ring around the last lens element that holds the puddle in place while the wafer races underneath, and it eventually let the wafer move three times faster with an order of magnitude fewer defects.
By the end of 2004 TSMC had working 90nm chips from early immersion tools. In 2006 ASML’s XT:1700Fi raised NA from 0.93 to 1.2 at 122 wafers an hour, which let chipmakers improve resolution by 30%, the largest gain in decades. Later lenses reached 1.35, the NA of ZEISS’s Starlith 1900i immersion lens. By ASML’s count, more than 1,100 immersion systems had shipped by 2023.
Water helped focus too: ASML credits immersion with better depth of focus as well as resolution. Pushing NA on to 1.35 still narrowed the focus window, and the water itself brought new defect sources. EUV went the other way at first. It used a modest NA of 0.33, with the huge wavelength gain doing the work. Part 3 picks up the story when EUV, too, raises its NA.
Pushing k1 down
Everything else in the process sits in k1, and ASML’s page on it lists the main levers. First comes the illumination. Shining light onto the mask from an angle, called off-axis illumination, controls how the light diffracts from fine patterns so more of the useful light gets through the lens. Shaping the light into pupil patterns, from simple spots to complex arrangements of dots, tunes the contrast for a given layout. ASML’s DUV scanners shape the pupil with FlexRay, which packs 4,000 individually controlled mirrors into an array that can form any pattern on demand. Its EUV tools use a similar illuminator, FlexPupil.
Second is the mask. ASML’s computational lithography simulates the manufacturing process, using the data its systems generate, to design the reticle so that its machines print what they should. ASML calls the technique optical proximity correction (OPC) and often combines it with illumination optimizations. OPC began with a first generation that grew out of manual mask corrections and design rules, and looked up predefined corrections for features such as line ends and corners. Model-based OPC added a simulation and correction feedback loop and was first implemented in 2001 for early 193nm systems, according to a 2025 review in Light: Science & Applications. The figure draws the idea on one L-shaped feature, with serifs added at the corners and hammerheads at the line ends; the shapes are illustrative. The corrected mask may end up looking quite unlike the pattern it prints.
Pushing k1 down
Optical proximity correction on a simple shape
imec’s 2017 EUV work built a full-chip 2D OPC model to design its block masks. Inverse lithography computes the mask shape working back from the desired print. It is expected to help extend low-NA EUV, and curvilinear mask features are driving better data representation and wider use of multi-beam mask writers, according to the IRDS. Phase-shifting masks change the phase of light passing through parts of the mask to sharpen edges, and they are another long-standing lever. For High-NA EUV, dispersion in attenuated phase-shift absorbers is among the issues computational lithography must address.
Each of these gains is small, and they stack. ASML’s figure for ArF light at 193nm is 38nm, about a fifth of the wavelength. But near k1 = 0.25, a single exposure runs out of room. For a line-and-space pattern, the pitch cannot go much below half the wavelength divided by NA, whatever the mask and illumination do. To go further, chipmakers stopped asking one exposure to print the whole layer.
Printing a layer more than once
Multi-patterning splits one dense layer into several sparser ones. ASML’s history describes the turn. As chipmakers pushed toward 32nm, they began exposing several simpler, interlaced patterns to build one complex layer, and overlay, not resolution, became the parameter that set the shrink. Simplest is litho-etch, litho-etch (LELE), which prints half the lines, etches them, then prints the other half in between. Its spacing is only as good as the overlay between the two prints, a problem Part 1 covers in its section on lining up the layers.
Self-aligned forms avoid that. In self-aligned double patterning (SADP), one exposure prints a set of lines called mandrels. A thin film is deposited over them and etched back so it remains only on their sidewalls, then the mandrels are removed. Each mandrel leaves two spacer lines, so the pitch halves. Film thickness sets the line width, and the lines sit on the mandrel edges, so no second exposure has to be overlaid. imec describes self-aligned quadruple patterning (SAQP) as one lithography step that makes a pre-pattern of lines, plus deposition and etch steps that make spacer-like features, so each initial line ends up as four lines at a four times denser pitch. A 2017 imec article calls it a double spacer technique, with the sequence of spacer deposition, spacer etch and core removal re-iterated to apply a second spacer.
Printing a layer more than once
Self-aligned quadruple patterning, step by step
imec’s published work shows how far this goes and what it costs. Its 2017 platform for the foundry N5 back end used 193nm immersion SAQP to print metal lines at 32nm pitch, with the cuts that break the lines into wires printed separately. Doing those cuts with immersion needed a triple block mask and a triple litho-etch flow. imec expected a 20% cost cut from printing the blocks and the vias with EUV instead. By 2019 imec was exploring four ways to print 16nm-pitch lines. They were immersion self-aligned octuple patterning (SAOP), which halves the pitch three times, from 128nm to 16nm, EUV SADP from 32nm, EUV SAQP from 64nm, and a self-aligned LELE variant. imec judged all four to have the potential, but they differed in process length, cost, design freedom and roughness.
This is the trade multi-patterning makes. Every extra pass adds deposition, etch, cleaning and metrology steps, adds cost, and stacks up variation. imec calls immersion SAOP an extremely long and complex flow. EUV earns its keep largely by replacing such flows with shorter ones, but according to the IRDS, EUV single patterning will not completely replace multiple patterning, and imec’s EUV SADP and SAQP runs show EUV paired with it too. Multi-patterning also changes design. At the smallest half-pitch the IRDS projects, 7nm, multiple patterning at 0.33 NA should be capable of printing it assuming continued use of Manhattan layouts, while curvilinear layouts could be more challenging to pattern with it, and High-NA EUV may have stochastic issues at that half-pitch.
The resist and the photon count
Resolution is not only optics. A resist has to turn a sharp light image into a sharp edge, and at small sizes it is often the limit. In the IRDS’s framing, resist performance is a three-way trade between resolution, line-width roughness and sensitivity, where improving one tends to cost another. A more sensitive resist needs less light, which speeds up the scanner, but it also responds more to the random variations in where light lands.
That randomness is sharpest at EUV. A photon’s energy rises as its wavelength falls, so a 13.5nm photon carries about 14 times the energy of a 193nm one. Deliver the same dose (the same energy per area) and about 14 times fewer photons arrive. At small feature sizes, the number landing in any given spot becomes small enough that its statistical spread shows up in the pattern.
The resist and the photon count
The same dose in ArF and EUV photons
Each square gets the same dose. Fewer, larger quanta mean more random spread.
Chipmakers face stochastic failures here, a class of defect not typically seen in optical lithography, in the IRDS’s words. They come from photon shot noise, from where photons are absorbed, from the paths of the electrons they release, and from randomness in the resist chemistry itself, and they show up as bridged lines, broken lines, merged contact holes or missing ones. Their rate rises steeply as pitch shrinks, and the IRDS adds that in some cases this has already forced multiple patterning back in. imec’s work points the same way. It found single-exposure EUV reaching its limit at pitches of 32nm to 30nm, so EUV multi-patterning arrives sooner than expected, mainly because of stochastic failures. Turning up the dose cures it, but that slows the scanner, and EUV time is expensive.
So the resist is changing. Chemically amplified resists have been the polymer workhorses since DUV, and they are made mostly of carbon and oxygen, which absorb EUV weakly. Metal-oxide resists absorb far more. In JSR’s account, metal-oxide resist particles are below 2nm across, organic ligand included, which helps ultimate resolution, and etch resistance is generally higher than for polymer resists. The IRDS puts metal-oxide resists in some memory production already and expects logic to follow at the “1.4nm” node. It also covers resists deposited dry, for precise thickness and composition and better stochastic control, and dry development. And PFAS is part of the composition of most of the emerging resist platforms, a restricted material, so the chemistry is under pressure to drop it.
Making 13.5nm light
EUV changes nearly everything in the scanner, starting with the light. 13.5nm light had to be engineered from scratch, and ASML’s source makes it from tin. In ZEISS’s sequence, 50,000 tin droplets a second are fired into a vacuum chamber, and each is hit by two pulses from a CO2 laser made by TRUMPF. A pre-pulse spreads the droplet out, and the main pulse heats it into a plasma that emits EUV, at nearly 220,000°C, almost 40 times hotter than the surface of the Sun. ZEISS’s EUV technology page says the laser runs at 30kW, about twice a classic industrial laser that cuts centimeter-thick steel.
Making 13.5nm light
The light path of an EUV scanner
Each multilayer mirror reflects up to 70%; light is lost at every bounce.
Then the light has to be steered without lenses, because EUV is absorbed by every material, air included. ZEISS builds the optics entirely from curved mirrors in vacuum. A collector mirror behind the plasma gathers its light into an intermediate focus. The illumination system has 15,000 parts weighing 1.5 metric tons, and it shapes the light onto the mask. The projection optics have six mirrors in about 20,000 parts weighing 2 metric tons, and they image the mask onto the wafer at a 4x reduction. Ordinary mirrors do not work at 13.5nm either. ZEISS coats each one with up to 100 alternating layers of molybdenum and silicon, and ASML counts over 100, each only a few atomic layers thick. One layer reflects only about one percent of the light, but when the layers are spaced so the reflections line up in phase, the stack returns up to 70%. That loss at every bounce is why source power matters so much.
Masks change too. An EUV reticle is itself a multilayer mirror with a patterned absorber on top, reflecting the light rather than letting it through, and it is lit at an angle. A pellicle, if used, must pass EUV too, and every one costs some light. ASML’s is a membrane about 13nm thick that survives up to 500°C in vacuum. Angled light also casts shadows from the absorber’s height, so-called mask 3D effects, which low-n absorber materials have been demonstrated to mitigate, and which matter more for High-NA EUV, according to the IRDS. Hydrogen flows through the system to clean carbon and tin off the optics and mask, and the IRDS puts consumption at about 600 standard liters a minute per tool.
Power is the running constraint. TSMC reported more than 250W of EUV in daily production in 2019. Per the IRDS, sources now approach 97% availability in the field, more than 500W at the intermediate focus (the point where the collector gathers the light before the illumination optics) will come on the next tools, and 1kW has been shown in the lab. Each watt is expensive. The IRDS estimates 1.3 to 1.8MW of electricity to deliver 1kW of EUV to one tool. More power means more wafers per hour at a given dose. An ASML presentation at the 2023 EUVL conference rated its NXE:3600D at 160 wafers an hour at a dose of 30mJ/cm², and showed 185 in a demonstration.
At its investor day in November 2024, ASML rated the NXE:3800E at 220 wafers an hour, with a 500W source running at a higher tin droplet frequency; the slide states no dose for that rating. It said it had demonstrated 740W and identified measures to reach more than 1,000W. The IRDS 1kW lab figure and this 740W come from different documents and dates. In its annual report for 2025, ASML says it shipped NXE:3800E systems that year at full specification, which includes 220 wafers an hour. These are ASML’s own figures.
Why EUV took so long
Research began in the 1980s and the first volume products came in 2019. ASML’s own history, with TSMC’s release for the first volume products, gives the milestones, and Fab Tracker dates every step of the lithography ladder and counts the EUV systems ASML sold each year.
Why EUV took so long
EUV from research to volume production
ASML dates the first research to the 1980s and the industrial push to 1994, when a coalition of chipmakers and suppliers, ASML among them, built the first prototype. Over time the others dropped away, and only ASML with its partners kept going. It shipped demo tools to the College of Nanoscale Science and Engineering in Albany and to imec in August 2006, a pre-production NXE:3100 in 2010, and the first production system, the NXE:3300, in 2013. Even then, it took until 2016 for orders to pick up. By its own count ASML invested more than €6 billion in EUV R&D over 17 years, and bought Cymer to speed up development of the light source. ZEISS puts its own EUV research and development at more than 30 years, and its EUV-related patent applications at more than 1,500.
TSMC called its N7+ the first EUV process to deliver customer products in high volume. It entered volume production in the second quarter of 2019 with 15% to 20% more density than N7. imec’s 2019 article expected the first EUV layers in the most critical metal layers and vias of the N7 back end, at pitches of about 36 to 40nm. ASML shipped its 100th EUV system in early 2020 and delivered its first High-NA system in December 2023.
Part 3 takes the next step. It covers High-NA EUV, with its anamorphic optics and half-size field, alternatives like nanoimprint, and what all of this means for DRAM and for 3D NAND, which found a way to keep scaling without needing finer lithography.
Sources
Primary is the original paper, standard or datasheet. Secondary is a review, a vendor summary or a news report. Measured is my own test data.
Show all 19 sources, 19 primary
- Primaryimec magazine March 2017 - First EUV lithography high-volume manufacturing solution for N5 BEOLimec, 2017
- PrimaryEUV lithography: weighing the optionsimec, 2019
- PrimaryTSMC’s N7+ Technology is First EUV Process Delivering Customer Products to Market in High Volume|Taiwan Semiconductor Manufacturing Company LimitedTaiwan Semiconductor Manufacturing Company Limited, 2019
- PrimaryIndistinguishable from magic: the EUV pellicleASML, 2022
- PrimaryLight of the future: EUV lithography by ZEISS SMTZEISS, 2022
- PrimaryASML: EUV Industrialization (EUVL Conference 2023)ASML, 2023
- PrimaryHow immersion lithography saved Moore’s LawASML, 2023
- PrimaryASML: EUV Products and Business Opportunity (presentation)ASML, 2024
- PrimaryAdvancements and challenges in inverse lithography technology: a review of artificial intelligence-based approachesLight: Science & Applications (PMC), 2025
- PrimaryInternational Roadmap for Devices and Systems 2025: LithographyIEEE IRDS, 2025
- PrimaryAll about light and lasers in lithographyASML
- PrimaryASML EUV lithography systemsASML
- PrimaryASML Form 20-F, fiscal year 2025U.S. SEC
- PrimaryEUV lithography and technologyZEISS
- PrimaryLenses & mirrors - Lithography principlesASML
- PrimaryLithography OpticsZEISS
- PrimaryMetal Oxide Photoresists Development for EUV LithographyJSR Technical Review
- PrimaryPushing k1 further in microchip manufacturingASML
- PrimaryWhat is the Rayleigh criterion?ASML
















































































































