The Memory Cycle

Micron’s own filings show the cycleThe memory cycle is the repeating swing in memory prices and profits: a shortage lifts prices and spending, new fabs add supply, and prices fall until spending stops. in US dollars from fiscal 2001, because its totals before then are not memory alone. The fiscal 2000 report still counts PC operations, 14% of net sales. In fiscalA fiscal year is the twelve-month period a company reports on. It often differs from the calendar year, so the same quarter name can mean different months at two companies. 2002, after the dot-com bust, it sold $2.6 billion of memory and had an operating loss of $1.0 billion doing it.

Fiscal 2003 was worse, an operating loss of $1.2 billion. Thin operating profits came only in fiscal 2004 to 2006, and fiscal 2007 and 2008 were operating losses again. Then came the financial crisis. In fiscal 2009 Micron’s operating loss was $1.7 billion on $4.8 billion of revenue.

The fiscal 2012 operating loss was smaller, $612 million. Fiscal 2016 ended just above break-even at $168 million of operating profit on $12.4 billion of revenue.

Then the best run Micron had seen, with $30.4 billion of revenue in fiscal 2018 at a 49% operating marginOperating margin is operating income divided by revenue: the share of each sales dollar left after the costs of making and running the business, before interest and tax.. The next two years gave back more than a quarter of that revenue.

Fiscal 2023 was the steepest fall on the chart. Revenue halved, from $30.8 billion to $15.5 billion, and its operating loss reached $5.7 billion.

Then SI servers arrived. Fiscal 2026 revenue was $133.2 billion, more than three times the year before, at a 75% operating margin. Every earlier peak on this chart was followed by a fall.

Adding memory supply takes three things at once, which are tools, money and years. The tools come first. Leading-edge chips need EUV scanners, which bounce extreme ultraviolet light off a chain of mirrors to print the pattern on a mask onto a wafer, and one company, ASML, makes them.

ASML puts its 2026 capacity at around 65 low-NA EUV systems, for the whole industry, and every logic and memory maker shares that year’s output.

Bernstein estimates that every 100,000 wafers a month of new DRAM capacity needs about six of them on the current node.

Money is the next barrier. SEMI expects memory makers alone to spend $57 billion on 300mm fab equipment in 2027, after $52 billion in 2026, and $175 billion across 2027 to 2029. The years are another barrier, since Micron broke ground on its first Idaho fab in September 2022 and expects first wafers in mid-2027.

Few companies can carry all three. Micron’s annual report names six memory competitors, which are Samsung, SK hynix, Kioxia, Sandisk, CXMT and YMTC. It was not always this way. The Memory Guy counted 23 DRAM suppliers at the late-1980s peak, and Evertiq counted 20 in the mid-1990s.

By 2011 there were six of note, and by 2021 the top three held 94% of the market.

Construction Physics puts a fab around 1970 on the order of $4 million and a modern one at $10 billion to $20 billion or more, with each new process node adding about 30% to the cost. BCG estimated in 2023 that a fab completed in 2026 carries a ten-year total cost of ownership of $35 billion to $43 billion. Each downturn took out the companies that could not fund the next generation.

Even the makers pool money where they can. In Kioxia’s results material, the joint venture with Sandisk is how both companies use economies of scale through joint development and shared investment. Governments pay part of the bill too, with US CHIPS ActThe CHIPS Act, the Creating Helpful Incentives to Produce Semiconductors for America Act, is the US law under which the Commerce Department funds new chip fabs in the United States. grants to Micron of up to $6.4 billion plus a 35% investment tax credit. A newcomer would need all of that, and the years, before selling a single bit.

Makers describe supply as bit growthBit growth is how much the total number of memory bits shipped rises from one period to the next. It measures supply in bits, not in chips or dollars., meaning how many more bits the industry ships than the year before. They give it in words, not numbers. Micron expects NAND bits to grow in the low 20s percent in 2026 and the mid 20s percent in 2027 and 2028, and DRAM bits in the mid 20s percent in 2026 and the low 20s percent after. Kioxia expects NAND bit growth in the high teens in 2026.

Two NAND makers disagree on 2026 but agree on the direction. Micron expects both NAND and DRAM to stay supply constrained in 2027 and 2028, with conditions much tighter than in 2026. Kioxia expects NAND demand to exceed supply in 2027, and SK hynix reports that customer demand already exceeds what it can supply.

No free source publishes how many exabytes the world makes or needs each year. TrendForce publishes the next best measure, a sufficiency ratio that equals supply minus demand as a share of demand. It puts DRAM about 1% to 2% short in 2026 and expects the gap to widen in 2027. It puts NAND 4% to 5% short in 2026 and expects the balance to turn positive in the second half of 2027.

Closing that gap is hard. SEMI expects 300mm memory capacity, DRAM and NAND together, of 4.1M wafers a month in 2026 and 4.2M in 2027, while Micron expects industry bits to grow in the low to mid 20s percent a year. On that count, which covers DRAM and NAND together, wafers rise only about 2%, so most of that growth has to come from denser chips, and by TrendForce’s view the big three DRAM makers will add bits in 2026 and 2027 mainly by moving to newer processes. A few percent short sounds small, and the price chart at the end shows how much it moves prices.

The one volume unit the free sources share is wafers. Bernstein estimates the DRAM industry adds about 145,000 wafers a month of capacity in 2025 and 245,000 in 2026. Those are DRAM wafers added in a year. SEMI’s 4.1M and 4.2M in chapter 3 are the total 300mm capacity for DRAM and NAND together, so the two measure different things, and neither source reconciles them.

Bernstein has the additions rising to 330,000 wafers a month in 2027 and 435,000 in 2028, which brings industry capacity to 2.58 million wafers a month.

On the demand side, TrendForce, citing reports, puts OpenAI’s Stargate project alone at up to 900,000 DRAM wafers a month, which could account for nearly 40% of global DRAM output. That is a level of demand, and Bernstein’s figures are yearly additions, so they are different kinds of number.

Tools set the pace of the additions at about six EUV scanners for every 100,000 wafers a month, out of around 65 a year. Flash demand is moving the same way. Sandisk expects SI data centers alone to consume 1.2 zettabytes of NAND by 2030, and enterprise SSDs already took 48% of all NAND bits shipped in the second quarter of 2026, up from 26% a year earlier, per Counterpoint.

An SI accelerator with HBMHigh Bandwidth Memory stacks DRAM dies on a base die and links them with thousands of vertical wires, giving a very wide, short path to a processor on the same package. passes through four steps, and each has its own limit. ASML plans to add 30% to its EUV capacity for 2027. TSMC held 72.5% of foundryA foundry makes chips that other companies design, selling manufacturing rather than chips of its own. revenue in 2026’s second quarter. CoWoSCoWoS is TSMC’s packaging that places a processor and its HBM stacks side by side on a shared silicon interposer., the packaging that joins the GPU and its HBM, has been short since 2023, and TSMC plans to expand it by over 60% by 2027. TSMC’s US investment plan, announced in March 2025, totals $165 billion, made up of $100 billion of new investment, including three new fabs, two advanced packaging facilities and an R&D center, on top of $65 billion already going into Phoenix, Arizona.

Because the steps are chained, the slowest one sets the pace. An accelerator is sold only when its logic die, its HBM stacks and its packaging slot are all ready, and each chip needs more HBM every generation. By TrendForce’s figures, HBM per SI ASIC rises from 96GB or 192GB to 216GB or 288GB in 2026, and NVIDIA’s Rubin Ultra raises it to 384GB per GPU in 2027. More memory per chip means the DRAM step tightens even when the number of chips does not grow.

New supply arrives years after the decision to build it. Micron broke ground on its first Idaho fab in September 2022.

Construction began in October 2023.

First DRAM wafers are expected in mid-2027, almost five years after the ground was broken.

Micron’s first New York fab broke ground in January 2026 and expects first wafers in 2030, the start of a site of up to four fabs over the next 20-plus years.

Micron expects both DRAM and NAND to stay supply constrained in 2027 and 2028, the band on the chart. A fab started now makes its first output after it.

Buying a working fab does not skip the wait. Micron bought the Tongluo fab in Taiwan in March 2026 for $1.8 billion and expects meaningful shipments in mid-2027. Almost every announced site starts output in or after 2027 and 2028.

First output is not full output either. A new fab becomes meaningful a few quarters after its first wafers, Micron notes, and TrendForce doesn’t expect substantial output from the 2027 additions until 2028.

Demand changed shape. Servers now take more than 40% of NAND bit demandBit demand is how many memory bits buyers want in a period, the side of the market that bit growth has to meet. by TrendForce’s count, while smartphones and notebooks together still take nearly 40%. In DRAM the change is HBM.

Micron’s annual report says HBM needs more wafers and more cleanroom space than ordinary DRAM for the same number of bits. TrendForce puts HBM at 22% of the top three makers’ DRAM wafers by the end of 2026.

Those wafers give back 9% of DRAM bits.

By the end of 2027 TrendForce expects 30% of the wafers for 13% of the bits. Every wafer moved to HBM yields fewer bits than it would as ordinary DRAM.

The cloud providers pay for it, with memory expected to take 47% of the major cloud providers’ capexCapital expenditure is money a company spends on fabs and tools that will produce for years. Memory makers raise it to add supply, which arrives only once the fabs are built. in 2026 and 68% in 2027. Across the whole chip market, WSTS’s August release now expects memory to grow about 302% in 2026 and puts first-half memory growth at 305% from a year earlier. Consumer devices move the other way, as smartphone production is forecast down 15% to 20% and notebook shipments down about 10% in 2026.

Each market sits with a few companies. In the second quarter of 2026, Counterpoint puts Samsung, SK hynix and Micron at 38%, 25% and 24% of DRAM revenue.

SK hynix held half of HBM revenue that quarter.

NAND is spread wider, with Samsung at 28% of revenue that quarter.

Revenue share rises with price, so bits tell a different story. By NAND bits shipped in that quarter, Counterpoint puts YMTC third at 14%, level with Kioxia, even though it ranks fifth by revenue, because most of its bits go into cheaper consumer products.

In logic, TSMC alone held 72.5% of foundry revenue in the same quarter.

Chinese makers are gaining fastest. CXMT went from 4% of DRAM revenue in the second quarter of 2025 to 10% a year later, YMTC held 14% of NAND revenue that quarter, and TrendForce expects Chinese suppliers to reach nearly 19% of global NAND bit output.

In wafers, the Korean leaders look further ahead still, though the figures rest on different bases. In October 2025, TrendForce, citing The Bell, reported Samsung’s DRAM output projected in the mid-600,000s of wafers a month and SK hynix’s planned capacity near 620,000 by the end of 2026. Tom’s Hardware reports a Citrini Research model that puts CXMT’s wafer starts at about 350,000 a month at the end of 2026, only 25,000 behind Micron. One basis is planned capacity and the other a modeled count of wafer starts. That makes CXMT the maker to watch. It holds 10% of DRAM revenue but is close to Micron in wafers, so its share can grow quickly if its products keep up.

For anyone who buys flash or DRAM to build a product, concentration means allocation. With few suppliers and every one of them short, the makers choose who gets parts. TrendForce found NAND suppliers kept putting enterprise SSDs first in 2026 to offset weaker consumer profits, and HBM and server RDIMMs take 51% of DRAM bits. Consumer drives and modules get what is left, and TrendForce expects consumer DRAM to see the strongest price growth as suppliers cut its supply.

Prices carry the shortage. Server DRAM contract prices rose a cumulative 64% in the second half of 2025 and TrendForce expects about 270% more in 2026.

Enterprise SSD prices rose about 35% in the second half of 2025 and are projected to rise a cumulative 235% in 2026.

HBM contract prices could still rise 70% to 140% in 2027, even though some long-term agreements signed from 2Q26 on include price ceilings.

For DRAM, Micron has no line of sight to when supply and demand return to balance, so waiting is a bet on relief nobody has dated. If you need memory, buy what you need when you need it rather than holding out.

For NAND the sources disagree. TrendForce expects supply to catch up in the second half of 2027, helped by weak consumer demand, while Micron and Kioxia expect NAND to stay short in 2027. Module makers have built up inventoryInventory is finished chips held by makers or buyers. A large inventory lets buyers wait, which pushes prices down, and a small one does the reverse. while the chip makers run lean, so I read consumer relief as likely to show there first. If a drive can wait a year, the TrendForce view says waiting may pay; if it cannot, the makers’ own outlooks say prices will not fall soon. Best SSDs lists the current picks for each tier.