Sourced charts
How storage and memory hardware changed, in five sourced charts, the standards behind them, leaderboards and dies drawn to scale. Every point links to the paper, release or datasheet it came from.
Each timeline is built the same way. A point sits at the date of the earliest public source cited for it, which is the date something was announced or published and not the year it reached shelves. Values are what the maker stated for the part, never a test-chip peak. Where a maker prints only a lower limit, the value carries a plus sign, and a value worked out from other stated figures, such as pin speed times bus width, is marked as worked out. Every value links to its source, and each chart covers parts with public documents, not every part ever made.
A record is one dated part on a timeline, and the record counts on this page all count the same thing. A chart plots only the records that state the measure it draws, so a chart can show fewer points than its timeline has records.
Storage and memory
The NAND dies and the controllers that drove them, and the hard drives beside them, then DRAM dies from SDR to DDR5, LPDDR and GDDR, and the HBM stacks that sit beside accelerators.
Real NAND dies charted by the year of the earliest paper or announcement cited for each, with layers, bit density and interface speed, and every point sourced.
Try this: Switch between layers, bit density, interface speed and cell type, then click a point to see the paper behind it.
Open NAND Die TimelineSSD controllers charted by the date of their public brief, with the fastest NAND speed each listed, its host link, and every row linked to its source.
Try this: Filter by host bus, sort the table, then click a point to jump to the controller brief behind it.
Open Controller TimelineHard drive capacity and recording method by year, from the first perpendicular drives to heat-assisted ones, each dated by the maker's release and linked.
Try this: Follow hard drive capacity by year, then filter by recording method to see where shingled, microwave and heat-assisted drives took over.
Open HDD TimelineSDR, DDR, LPDDR and GDDR dies by vendor, dated by the earliest public source, with the JEDEC DDR data rate line and every value linked.
Try this: Switch to data rate, watch the JEDEC line step up, then click a die to see the release or datasheet behind it.
Open DRAM Die TimelineHBM stacks by vendor and the accelerators that used them, charted by the date of the earliest public source, with the JEDEC standard line and each value linked.
Try this: Compare stack bandwidth by vendor, then see which accelerators used each generation.
Open HBM TimelineEvery other page under Timelines, from the standards timeline to SSDs ranked by endurance and dies drawn beside a coin.
The standards behind the hardware, the history of flash in one sitting, and the meetings where the next parts are announced.
TimelineStandards, by Area NAND, DRAM and HBM interfaces, PCIe and CXL, NVMe, mobile and external links, each row linked to the standard itself.
Stop-motion filmFlash, Frame by Frame Flash memory from the first floating-gate cell to stacks of hundreds of layers, as a stop-motion walk through its milestones.
CalendarEvents The conferences and trade shows where NAND, DRAM, SSD and HBM news is announced, each date linked to the official event site.
Reading listWebster’s Corner Papers, talks and standards worth reading, each linked to its publisher.Drives and defects ranked from the makers’ and sellers’ own documents, never from a test of our own.
Real dies at their real size, so a stated area turns into something you can see.
Explore
Pick a timeline and a measure, then filter by maker or era. The strip below dims whatever a filter leaves out, so you can see which maker was first, and when.
Each tick is one record. Where ticks bunch up, the public record is thick. Storage is mint and memory is amber. Numbered pins mark the first record in this data to meet a test, such as the first 3D die or the first DDR5 die.
First DDR2 die, 2003
0.11-micron 1Gb DDR2 (development completed)Announced
First DDR3 die, 2007
78nm 1Gb DDR3 (evaluation samples)Sampling
80nm 1Gb DDR3 (first Intel validation)Announced
First PCIe-attached SSD, 2011
OCZ RevoDrive card (two SandForce SF-1200)
First DDR4 die, 2011
30nm-class 2Gb DDR4 (developed)Announced
First NVMe-capable controller, 2014
SandForce (Seagate/LSI) SF3700 (SF3719/29/39/59)
Source: Sandforce Client Flash Controller SF3700 Data Sheet DS1826.1-1409US
First HBM accelerator, 2015
AMD Radeon R9 Fury X (Fiji)
First HBM2 stack, 2016
Samsung HBM2 4GB (later called Flarebolt)Mass production
Source: Samsung Begins Mass Producing World's Fastest DRAM, Based on Newest HBM Interface (4GB HBM2)
First M.2 SSD at 2TB or more, 2016
First GDDR6 die, 2018
10nm-class 16Gb GDDR6 (mass production)Mass production
First LPDDR5 die, 2018
10nm-class 8Gb LPDDR5 (development)Announced
First DDR5 die, 2018
1Ynm 16Gb DDR5 (developed; RDIMM and UDIMM supplied to a chipset maker)Announced
First PCIe 4.0 controller, 2019
First HBM2E stack, 2019
SK hynix HBM2E 16GB (development announced)Announced
Source: SK hynix Develops World's Fastest High Bandwidth Memory, HBM2E
First M.2 SSD at 4TB or more, 2020
Sabrent Rocket 4TB
Source: Sabrent Rocket NVMe 4TB PCIe Gen3.0 x4 M.2 SSD Review
First M.2 SSD at 8TB or more, 2020
Sabrent Rocket Q 8TB
Source: Sabrent unveils world's first 8TB NVMe M.2 SSD: up to 3.4GB/sec reads
First heat-assisted (HAMR) hard drive, 2020
Seagate 20TB HAMR drive
Source: Seagate's New Solutions Equip Enterprises for the New Data Economy (24 Sep 2020)
First microwave-assisted (MAMR) hard drive, 2021
Toshiba MG09, 18TB
Source: Toshiba Unveils New 18TB MG09 Series Hard Disk Drives (Feb 2021)
First PCIe 5.0 controller, 2021
Marvell Bravera SC5 MV-SS1331
Marvell Bravera SC5 MV-SS1333
First HBM3 stack, 2021
SK hynix HBM3 (24GB and 16GB types)Announced
First DRAM die at 24 Gbit or more, 2021
1anm 24Gb DDR5 (samples shipped)Sampling
Source: SK hynix becomes the Industry’s First to Ship 24Gb DDR5 Samples
First GDDR7 die, 2023
16Gb GDDR7 (development)Announced
First DRAM die at 32 Gbit or more, 2023
12nm-class 32Gb DDR5 (development)Announced
First NAND interface standard at 4800 MT/s, 2024
First M.2 SSD at 16TB or more, 2025
Exascend PE4 16TB
Source: Storage Beyond Boundaries: Exascend at Embedded World 2025
First HBM4 stack, 2025
SK hynix HBM4 12-layer 36GBSampling
Source: SK hynix Ships World's First 12-Layer HBM4 Samples to Customers
First HBM4E stack, 2026
Samsung HBM4E 12-layer 48GB (samples)Sampling
Source: Samsung Electronics Begins Shipment of Industry-First HBM4E Samples (29 May 2026)
A first here means the earliest charted part that meets the test, dated by the earliest public source cited for it. It is not a claim about the whole industry.
