Week endingFriday, November 6, 2026Covers October 31 to November 6, 2026 · 22 items
The biggest technical thread this week was memory built directly on top of logic. Qualcomm says its first stacked memory silicon works in the lab, and new papers look at running AI work inside DRAM and on high bandwidth flash. On the NAND side, the two partners that share a fab are taking different paths on HBF, and a report says Solidigm is weighing new US fabs.
Tight memory supply also showed up far from the data center, with Raspberry Pi raising prices on its largest memory boards. Industry sales data and a wafer supply deal for Micron round out the market news, and Eyes on Flash added several new guides and a hard drive timeline.
In a newsroom post, Solidigm leaders describe the floating gate cell behind the company’s read intensive QLC drives and why they kept it while most of the industry moved to charge trap.
Solidigm ·
Qualcomm reports that its first HBC silicon, with DRAM tiers bonded on a logic base die, ran the full read and write path and near memory compute in its lab. It says a data center product has taped out and early bring up is under way.
Qualcomm ·
Marvell and Lumentum signed a definitive agreement to combine, aimed at optical and electrical links for AI clusters. The deal is announced, not closed.
Marvell ·
A trade outlet reports that Kioxia has not joined the HBF consortium that Sandisk backs, even though the two companies run their NAND fabs together. The outlet's view on which dies HBF can use is its own reading, not a company statement.
Reported by Blocks and Files; the company has not confirmed it yet.
A press report says SK hynix's Solidigm is studying new US NAND fabs and how to fund them. SK hynix said no final decision has been made and the plans remain under consideration.
Reported by TrendForce; the company has not confirmed it yet.
Entegris says it will work more closely with Kioxia on materials and process technology for later BiCS FLASH generations, using AI modeling and digital twins to narrow candidates before lab tests. The Geino Technology Center in Mie, Japan, is the hub.
Raspberry Pi says it is raising the price of its top memory configurations because it has no alternative supply for the DRAM they use. Its other models keep their prices.
Everspin says it is chairing a JEDEC task group, formed under the low power memories subcommittee, that will explore a standard for persistent memory on the LPDDR interface.
South Korea's trade ministry released its October trade figures, with semiconductor exports again far above a year earlier as memory prices stay high.
GlobalWafers says its board approved a private placement of convertible bonds that Micron alone will buy, part of the financing support and long term wafer agreement the two announced in July.
The Semiconductor Industry Association says global semiconductor sales rose sharply from the second quarter to the third, based on WSTS three month averages, with September far above a year earlier.
The authors use the parallelism inside DRAM arrays to run part of language model decoding where the weights are stored, instead of moving them to the processor.
arXiv ·
PagedMoE keeps a large model's experts on an SSD and caches them in memory at different precisions, so fewer slow reads are needed per token.
arXiv ·
HyPAIC stores a very large model's read-only weights in high bandwidth flash and keeps changing data in DRAM, a design proposal rather than a product.
arXiv ·
The authors move file handling into the drive itself, so peripherals and remote devices can open and read files without the host filesystem in the path. They extend the NVMe command set to carry NFS operations.
arXiv ·
eFDP watches writes and invalidations on a stock Linux kernel and decides which data to separate when several tenants share one FDP SSD, cutting garbage collection copying and write amplification.
arXiv ·