Week endingFriday, October 16, 2026Covers October 10 to October 16, 2026 · 13 items
Open Compute week set the tone. SK hynix showed a second generation CXL memory module along with liquid cooled enterprise SSDs, Marvell introduced new CXL memory expanders, and Kioxia put out a liquid cooled E3.S line of its own. Cooling and memory expansion are now treated as part of the drive and module design, not as an afterthought.
The other thread was putting work closer to the flash. FADU described an SSD that serves files itself, SK hynix described ferroelectric NAND for analog compute, and new papers look at ferroelectric crossbars and learned flow control for hybrid drives. Eyes on Flash published two memory guides.
SK hynix discusses an IEDM paper on a 3D NAND built with ferroelectric cells instead of charge trap cells, aimed at running analog compute inside the memory array. The throughput gain is the company's own claim.
SK hynix ·
At the San Jose summit SK hynix presented its second generation CMM DDR5 module on CXL 3.2, and also showed liquid cooled enterprise SSDs and a SOCAMM2 module for AI servers.
SK hynix ·
Kioxia announced liquid cooled versions of its PCIe 5.0 enterprise SSDs in the E3.S form factor, aimed at data centers that are moving to liquid cooled racks.
Kioxia ·
Hybrid SSDs write first to a fast SLC cache in front of QLC flash. DPDA partitions data dynamically to decide where writes go and aims to cut write latency.
The authors observe that retry cost varies with where a page sits in the block and with the flash type, and track read history with that in mind so the controller finds a working read offset sooner.
FADU's white paper proposes a drive that carries the file system itself, so a GPU or network card can open and read files by name without a host file system. It joins the file layer with the flash translation layer, a design shown in a prototype.
Marvell announced two Structera X parts that add memory to a server over CXL 3.2, for AI inference hosts. Its performance claims are its own and were not independently measured.
Revision 1.0 of the specification adds supplemental requirements for active PCI Express modules and cables, which matter for longer or faster links inside storage and compute chassis.
Published in Small, the work does charge domain computing in a crossbar of ferroelectric memcapacitors made with a NAND compatible process.
Small ·
The paper applies a learned policy to traffic between a flash tier and a shingled magnetic tier, with the goal of lower latency and longer flash life.
Cluster Computing ·
Published in IEEE Computer Architecture Letters, the study looks at how background read reclaim degrades endurance when high bandwidth flash holds model weights for inference.
IEEE CAL ·