Week endingFriday, August 14, 2026Covers August 8 to August 14, 2026 · 9 items
A quiet week after the Future of Memory and Storage show, with the company news dominated by Sandisk. Sandisk and Kioxia unveiled a ninth generation QLC flash technology built for AI storage, and a day later Sandisk used its investor day to lay out strategy and a multi year financial model through fiscal 2030. Phison published its second quarter results and Micron launched a new venture fund aimed at AI companies.
On the research side, high bandwidth flash drew the most attention, with several papers testing how it would work for language model serving. Another paper measured how read disturbance hurts SSD performance across drives from ten makers. Silicon Motion also introduced a reference design kit for enterprise SSDs aimed at AI agent workloads.
The two companies describe a new high performance QLC flash design that pairs advanced CMOS circuitry with a proven memory array platform. They say it is meant to keep up with AI storage demand while letting NAND scaling stay capital efficient.
Sandisk and Kioxia ·
At its 2026 investor day Sandisk described product and technology priorities and introduced a financial framework covering fiscal years 2028 through 2030.
Sandisk ·
Phison released its consolidated results for the second quarter in a filing posted to its site.
Phison ·
Micron Ventures opened its third and largest fund, which will invest across AI models, compute infrastructure, enterprise applications and physical AI.
Researchers tested drives from ten vendors and show read disturbance can slow system level I/O. They also demonstrate an attack that degrades other processes by exploiting it.
arXiv ·
The design sends expert weights from flash to the GPU directly and also through the HBM base die, aiming to raise delivery bandwidth for large language model serving.
arXiv ·
The authors find the flash can raise batch size and throughput, but only if it sustains read bandwidth close to HBM and its endurance improves.
arXiv ·
The paper measures a flash tier built from high bandwidth flash under production traces and finds that transient KV cache traffic, mostly writes, defeats the benefit unless placement is reuse aware.
arXiv ·
The architecture buffers intermediate values in a fast DRAM subsystem and keeps static weights in dense TLC flash, which targets the long program time of NAND.
arXiv ·