Week endingFriday, September 25, 2026Covers September 19 to September 25, 2026 · 8 items
A quiet week for flash and a busy one for DRAM. CXMT said its newest DRAM platform is in mass production and showed phone memory built on it, Samsung said its LPDDR6 passed validation on Qualcomm's next flagship phone platform, and SK hynix used its annual forum to lay out its AI strategy. Samsung's HBM4 plans drew a report from Korea, and Cloudian qualified a Samsung enterprise SSD family.
The research side leaned toward high bandwidth flash. Three new preprints model it, simulate it, or use it, and one ties CXL attached flash to LLM serving.
At a manufacturing convention in Hefei, CXMT announced that its G5 platform has entered mass production and unveiled two LPDDR5X products built on it, aimed at phones and portable devices. The company says the platform fits more dies on each wafer than its predecessor.
CXMT ·
Cloudian says Samsung's PM1753 drives passed its validation program, so they can be used in HyperStore object storage deployments for AI data lakes and for training and inference workloads.
Cloudian ·
At its yearly forum in Santa Clara, SK hynix's CEO and executives described the company's roadmap and growth plans, including its Yongin cluster, its Indiana fab and a new AI research center in the US.
SK hynix ·
Samsung says its LPDDR6 has completed sampling and validation on Qualcomm's newest Snapdragon platform, which it calls an industry first, ahead of a joint showing at the Snapdragon Summit.
Seoul Economic Daily, citing industry sources, reports that Samsung plans to raise output of HBM4 and HBM4E sharply, judging from its orders for glass carriers, the supports that hold wafers while the DRAM is thinned. Samsung has not confirmed it.
Reported by Seoul Economic Daily (report); the company has not confirmed it yet.
The paper treats HBM and high bandwidth flash as one hierarchy for the KV cache and adapts sparse attention to flash page size and plane parallelism, aiming at faster long context decoding per GPU.
arXiv ·
The authors show that a stock CXL SSD is no faster than an NVMe drive for prefix caching, then design LM-CXD, which exposes KV chunks to the device and prefetches them layer by layer to cut time to first token.
arXiv ·
A new simulator couples GPU request limits, device queuing and NAND page behavior in one request path, so designers can see where channel layout and resource conflicts cap the bandwidth of flash placed next to a GPU.
arXiv ·