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    3D structure and process

    Replacement Gate Process

    Replacement gate builds a 3D NAND stack with placeholder layers and swaps them for metal wordlines at the end, the gate-last order of Samsung’s TCAT process.

    Replacement gate is the order in which modern high-layer-count 3D NAND gets its wordlines. The fab stacks oxide with placeholder layers of nitride, etches and lines the channel holes, and only then swaps the nitride for metal. Samsung’s TCAT process introduced that gate-last order with a tungsten fill, while Toshiba’s original BiCS formed its polysilicon plates first.

    Why the gate comes last

    A 3D NAND string is a hole through a pile of alternating layers, and every wordline layer has to be in the pile before the hole is etched. In a gate-first flow such as the original BiCS, those layers are the gates themselves, polysilicon plates that the hole goes straight through. TCAT puts a stand-in there instead and deposits the real gate only at the end of stack formation.

    Why the gate comes last

    Gate last: the placeholders become wordlines at the end

    Three panels show the same short stack of seven layers cut by one vertical channel hole. In the first, oxide layers alternate with silicon nitride placeholder layers and the hole is already lined. In the second, the nitride has been etched out, leaving empty slots between the oxide layers. In the third, tungsten fills each slot, and each tungsten level wraps the hole as the gate of the cell at that depth.01 STACK AND HOLEOxide and nitride,hole etched and lined02 NITRIDE OUTNitride etched outfrom between oxide03 METAL INTungsten fills eachslot as a wordlineOxideNitrideChannelTungsten
    Replacement gate in three steps, with the oxide layers and the lined hole unchanged throughout, not to scale. Source: Architectural and Integration Options for 3D NAND Flash Memories, Computers, 2017.

    Read the panels left to right. The oxide and the lined hole never change, and only the nitride slots do, emptied in the middle panel and filled with tungsten in the last. Each tungsten level wraps the hole and becomes the control gate of the cell at that depth.

    TCAT was proposed in 2009. Its gate-last order gives metal wordlines where a gate-first stack keeps silicon, and why metal pays off is the subject of the wordline metal page. Part 4 walks through the whole string build, from the first deposited layer to the finished gate.

    3 facts filed under 3D structure and process: all 3 are reported by a second source. Each was checked against the source’s own words, so its figures appear there, and each names where it comes from.

    Secondary sources

    • Gate-last replacement gate with tungsten fill was introduced by Samsung TCAT; Toshiba original BiCS formed polysilicon plates first (gate-first).

      Published resultFigures: 2009; gate-last vs gate-firstArchitectural and Integration Options for 3D NAND Flash Memories

    • TCAT uses gate replacement, depositing the gate layer only at the end of stack formation, while the original BiCS is a gate-first process.

      Published result3D Flash Memories

    • TCAT (Terabit Cell Array Transistor) was proposed in 2009.

      Published result3D Flash Memories

    Sources

    Primary is the original paper, standard or datasheet. Secondary is a review, a vendor summary or a news report. Measured is my own test data.

    Show all 2 sources