Controller hardware

Interleaving

4 sourced facts on Interleaving, each tied to the source it comes from.

4 facts filed under Controller hardware: all 4 were read in the original source. Each was checked against the source’s own words, so its figures appear there, and each names where it comes from. The idea is taught in Part 5, The Controller.

Primary sources

  • Agrawal et al.: about 100 us to transfer a 4 KB page from the on-chip register dwarfs the 25 us array read, so a flash package without interleaving produces only 8000 page reads per second (32 MB/s).

    Published resultFigures: 8000 pages/s; 32 MB/sDesign Tradeoffs for SSD Performance

  • Agrawal et al.: with 200 us programming time, so without interleaving a single part writes 3330 pages per second (13 MB/s), and interleaving the serial transfer with the program operation doubles the bandwidth.

    Published resultFigures: 3330 pages/s; 13 MB/sDesign Tradeoffs for SSD Performance

  • Agrawal et al.: with two independent dies in a package, three operations can be interleaved, letting writes and reads progress at the speed of the serial interconnect.

    Published resultDesign Tradeoffs for SSD Performance

  • Agrawal et al. show that interleaving within a die lifts a single part’s maximum read bandwidth to 10,000 pages per second (40 MB/s).

    Published resultFigures: 10000 reads/s; 40 MB/sDesign Tradeoffs for SSD Performance

Sources

Primary is the original paper, standard or datasheet. Secondary is a review, a vendor summary or a news report. Measured is my own test data.

Show all 1 sources, 1 primary