3D structure and process

Cell Footprint: 4F Squared vs 3D Cell Area

4 sourced facts on Cell Footprint: 4F Squared vs 3D Cell Area, each tied to the source it comes from.

4 facts filed under 3D structure and process: 1 read in the original source and 3 reported by a second source. Each was checked against the source’s own words, so its figures appear there, and each names where it comes from. The idea is taught in Part 4, 3D NAND Stacking.

Primary sources

  • The last planar generations were 15nm and 16nm parts from Toshiba and SanDisk, Samsung, SK hynix and Micron. TechInsights: Micron first (Feb 2014), SK hynix Oct 2014, then Samsung 16nm and Toshiba 15nm.

    Third-party reportFigures: 15nm, 16nmTechInsights: Inside 1X nm Planar NAND ...

Secondary sources

  • Samsung first V-NAND: honeycomb holes at 160 nm pitch, about 120 nm across at the top, bitlines at 20 nm half-pitch.

    Published resultFigures: 160 nm; 120 nm; 20 nmCharge-Trapping Non-Volatile Memories

  • Samsung’s first V-NAND: channel-hole pitch of 160nm, a large top diameter of about 120nm, and metal bitlines at a 20nm half-pitch.

    Published resultFigures: 160nm; 120nm; 20nmCharge-Trapping Non-Volatile Memories

  • V-NAND uses a honeycomb (hexagonal) layout of channel holes, which maximizes the hole density.

    Published resultCharge-Trapping Non-Volatile Memories

Sources

Primary is the original paper, standard or datasheet. Secondary is a review, a vendor summary or a news report. Measured is my own test data.

Show all 2 sources, 1 primary